Overview

Applications

·  Wireless access

·  Test and measurement

·  Early warning/radar

·  Cable TV access

·  Other high-performance RF applications

Y590 Neo integrates a high-capacity Zynq SoC FPGA, satisfying high-performance MIMO communication computing demands and enabling reliable large-scale distributed wireless systems.It features 4Tx/4Rx channels in a half-width 19" chassis. The RF front-end uses ADRV9026, supporting up to 200MHz instantaneous bandwidth per channel.With expansion, it covers DC–44GHz, supporting 5G FR1/FR2.GNU Radio open-source API and Xilinx FPGA HLS framework simplify development. Users can rapidly prototype and deploy SDR applications including 5G, phased-array radar and spectrum monitoring.

Product Description

Main features and interfaces

·  RF channels: 4TX, 4RX, 4ORX, supporting TDD and FDD

·  Transmitting power P1dB: ≥10dbm

·  Supported channels: 75MHz~6GHz

·  Signal bandwidth: bandwidth of 200 MHz, can be aggregated into 400 MHz

·  Transmission frequency error: ± 1ppm

·  EVM during transmission: better than 1.5%

·  Zero intermediate frequency mode: 4 channels

·  40G QSFP28 port, supporting a throughput rate of 40Gbps

·  Data processing unit: XILINX ZYNQ-7100, built-in dual core ARM Cortex-A9 CPU, clock speed of 800 MHz, can be set up to a maximum of 1GHz

·  PL DDR3 SDRAM:1GB,PS DDR3 SDRAM:1GB

·  Data interface: Gigabit Ethernet/40G QSFP28/USB 2.0 OTG/TF card

·  Synchronization interface: Supports external local oscillator input, external reference clock input/output, optional GPS

·  Debugging interface: USB JTAG

·  Power supply: 12V DC power supply, power below 45W

·  Size: Width 240 x Depth 283 x Height 58.5mm (including 8.5mm of foot pad)

·  Weight: Approximately 3 Kg

Powered by Xilinx ZYNQ 7100 SoC, it offers abundant FPGA resources for real-time low-latency processing and dual-core ARM CPU.Applications can run on preinstalled Linux or use Gigabit Ethernet and 40G optical interfaces.Flexible reference clock design supports external PPS, reference clock and GPS synchronization, ideal for large-scale MIMO systems.

Product Information

  • Interface schematic diagram of V3 YunSDR Y750neo

Documentations

Y590neo Datasheet_EN

2026-04-20

View Downloads

Y590neo Datasheet_CN

2026-04-20

View Downloads

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